Job Description: Digital IC circuit design engineering positions available immediately for self motivated, talented designers. Qualified candidates will have previous experience designing high performance full custom integrated circuits. Designers should have experience with HSPICE, static timing analysis tools (Motive, Pearl, etc), Dracula, and layout tools.

Designs typically push the technology edge at SEI. Our full custom designs push both performance and density limits. We are currently working with technologies down to .35u and die sizes 18mm on a side. Recent projects include a 64 bit RISC CPU, 200Mhz+ RAMDAC, 5ns embedded dual port SRAM, and a full custom 400k gate multimedia design, to name a few. An engineer can expect to be typically involved in 2 to 5 different projects per year. Design starting points range from marketing requirement documents to pre-existing designs which require modification. Responsibilities include direct customer interaction. Familiarity with industry standard IC design packages such as HSPICE, Viewlogic, HDL's (Verilog or VHDL), Pearl (or Motive), and Dracula is required.

Familiarity with Compass, Synopsys, or physical design tools is an additional advantage.

Qualifications: Minimum : BSEE plus 3 years experience. Desired : MSEE or equivalent and 5 years experience There are no positions available for individuals with less experience.

Salary: US$55-100k, depending on experience. Salaried, exempt position. Competitive benefit package. Relocation available.

Direct inquiries to:

Teresa Seward
Silicon Engineering, Inc.
269 Mt. Hermon Road, Suite 207
Scotts Valley, CA 95066

fax: 408-438-8509
email: tseward@sei.com